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Notes on RISC-V

Revision 5
© 2023-2024 by Zack Smith. All rights reserved.

About RISC-V

The increasingly important CPU architecture RISC-V originated at the University of California Berkeley, where researchers have for many years worked on reduced instruction set computer (RISC) designs.

RISC-V (pronounced risk five) is not a complete CPU design. It only specifies an instruction set architecture (ISA). This is in contrast to ARM, which provides both ISAs and CPU designs. The RISC-V ISA is free to use, whereas use of ARM's designs requires a license.

Caveat emptor

Because RISC-V doesn't specify a hardware design, when you buy RISC-V hardware you will not be able to know everything what the hardware is doing under the hood beyond implementing the RISC-V instruction set.

This might be of concern to anyone who experienced angst during the Intel Management Engine (ME) scandal, when it was discovered that the ME could potentially perform spying or be hacked.

The cross compiler

Whether you will be using real RISC-V hardware or emulating RISC-V, it is helpful to have a cross compiler on hand.

On Debian Linux, there is a GNU RISC-V cross compiler that is available, but my experience using it was that it produces buggy output, specifically: Qemu is unable to run even a simple Hello World program because the output erroneously relies on a nonexistent library:

 Could not open '/lib/ld-linux-riscv64-lp64d.so.1': No such file or directory

If you want to try it nevertheless, type the following at the command line:

 sudo apt install gcc-riscv64-linux-gnu
 sudo apt install binutils-riscv64-linux-gnu

If instead you want to compile the toolchain yourself, it is easy but a little time consuming. A maintained GNU RISC-V toolchain that I have used is here on Github.

You might also contemplate using Clang, which has cross-compiling as a built-in feature.

Using real hardware

RISC-V single board computers are now fairly affordable, at around $100. They are not as fast as e.g. a Raspberry Pi 4b, but they are useful for development work.

Even though a Linux distro will very likely be available for your board, you may nevertheless decide that you need to recompile parts of the operating system. For instance, the kernel.

Cross-compiling the kernel

In order to cross-compile the Linux kernel, you will need to specify to the kernel makefile what architecture you are compiling for:

 make ARCH=riscv menuconfig

It's important to select the correct devices, especially the SoC. The GPU may not be supported at all.

If you haven't been provided a reliable list of devices that your board uses, you will have to look in the documentation or detect them e.g. with lsmod, lscpu etc.

When you build the kernel you'll need to specify the architecture and the toolchain prefix:

 time make ARCH=riscv CROSS_COMPILE=riscv64-unknown-elf-gcc-

Using emulation

If don't have physical hardware, you will need to emulate.

At present, the best way to do this is with Qemu.

Most people are familiar with Qemu as a means to emulate an entire system, but this doesn't work well (or at all) with RISC-V. If you manage to reach a login prompt, you won't necessarily be able to proceed beyond it.

Qemu is useful because it lets you run command line programs, which have access to standard I/O.

Install Qemu

Most Linux distros either have Qemu included or you can install it. However the version provided by your distro might be outdated.

On Debian:

 sudo apt install qemu qemu-utils qemu-system-gui
 sudo apt install qemu-system-misc qemu-user-static

To get the latest Qemu source code, go here:

If you build from the sources, the configure script may tell you that some dependencies are missing. Try to install anything that looks important and run the script again.

Build and run a simple program

Here's a hello world hello.c:

 #include <stdio.h>
 int main () {
  puts ("Hello world.");
 }

Compile it:

 $ riscv64-unknown-elf-gcc hello.c

Run it:

 $ qemu-riscv64 a.out
 Hello world.

Bitcoin

There's a Bitcoin core build for RISC-V Linux here.

Debian 13 Trixie

There's a test build of Debian for RISC-V boards here.

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